First of all, we disquisition and analyse the actuality of the clock structure study of ASIC nowadays, and set forth the origin of this paper;Then, after studying concepts of the clock tree, the skew and jitter and their root causes, the clock classification and clock structure, and the timing and timing violations, we mainly introduced the two clock tree design methods which are used most in the recent design, fishbone and clock tree synthesis.

其次,在对时钟树的基本概念,时钟树的分类和结构,时钟偏差的概念和形成原因,数字电路中时序的基本概念作出大致阐述之后,着重介绍了两种现今在高性能集成电路中应用较多的时钟设计方式,鱼骨型时钟,和时钟树综合。